Microprocessors and other integrated circuitry (“chips”) are amazing feats of technology, but are of no use unless the information processed within such chips is accessible to other circuitry and eventually the humans that use such technology. Computer systems and devices that make use of integrated circuitry rely upon the accurate communication of information between chips, which are either combined on a multi-chip module or are communicating to other circuitry not on the same chip module. Moreover, the speed of such interchip communications is being stretched to the limits by which the signals can be accurately conveyed across the input/output (“I/O”) communication channels between such chips. Since the overall processing speed of a system is only as good as its slowest link, much emphasis is placed upon speeding up these interchip I/O communication channels (hereinafter merely referred to as “communication channels”).
Leakage of signals from one conductor (communication channel) to another is referred to as crosstalk, which becomes more prevalent as the speed of the communication signals along these conductors increases. This problem is especially a concern in modern flip-chip packaging placed on multi-chip modules. With modern processors, the number of communication channels increases dramatically as the number of peripherals needed for the processor to communicate with increase. Of these channels, some link chips together without ever going off the module, while others link chips where one chip is not on the module. In either case, the number of communication channels leaving the chip is increasing. All of these signals have the potential to interfere with one another. On the links that do not leave the module, the communication channels remain densely packed with one another compounding the crosstalk of these signals. The communication channels that leave the module may connect through large vias to a circuit board and then across the circuit board to another module. In this case, the channels spread out from one another, but the attenuation of the signals on the communication channels is much greater. The result is far less crosstalk, but much greater channel signal attenuation.
Crosstalk is directly related to the slew rate of the signals coming out of the driver connected to the communication channels. If the driver has a fast slew, then more crosstalk is generated, while a slower slew rate results in less crosstalk. FIG. 1 illustrates a data eye pattern of signals on a communication channel where the driver has driven the output signals with a slew rate 101. FIG. 2 shows another data eye pattern where the slew rate 201 is faster than the slew rate 101. It is desirable to have slower slew rates, but with such slower slew rates, the data eye collapses to the point where there is no longer any valid data. In other words, the receiving chips on the far end of the communication channels are unable to distinguish the data signals from noise signals. Referring to FIG. 4, illustrating a multi-chip module 401, it becomes a balancing act for the chip designer who desires a slower slew rate on the communication channels 404 between chips 402 and 403, but only slow enough to minimize the crosstalk induced on the channels 404, while keeping the data eye large enough for successful communications. However, referring to FIG. 5, slower slew rates between off-chip modules, such as chips 501 and 502, results in too much attenuation of the signals along the communication channels 503. With off-chip communications, it is thus desired to have a faster slew rate to therefore communicate signals using a “wider” data eye, such as the one illustrated in FIG. 2.
As can be appreciated, one size does not fit all, and thus different driver circuitry designs are needed depending upon the crosstalk and attenuation characteristics of the communications channels by which the signals will travel in a particular system architecture. For example, a driver circuitry design might be ideal for communications between chips not on the same chip module, but if implemented in the multi-chip module 401 for the communication channels 404, the highly capacitive characteristics of such communication channels 404 might result in a distortion 301 in the data eye as illustrated in FIG. 3.
Chip designers do not always know what system configurations their chips will eventually be implemented in, and thus it would be desirable to have a common solution for driver circuitry, which could be used with either communications between chips on the same module or off-chip communications.